Method and apparatus for reducing power consumption in a reference buffer circuit
AssigneeAnalog Devices International Unlimited Company
InventorsMaitrey Kamble, Sai Krishna Vallury
Life of this patent
Estimating the term…
Abstract
There is provided methods and apparatuses for reducing power consumption in a reference buffer circuit, comprising: receiving, at an amplifier of the reference circuit, a first signal from a reference voltage source; receiving, at the amplifier of the reference circuit, a second signal from a power supply; outputting, by the amplifier of the reference circuit, a voltage reference to an analog-to-digital converter, ADC; and controlling a power supply to the amplifier by feeding back a control signal representative of an operational phase of the ADC to the power supply.
Claims20
A method of reducing power consumption in a reference circuit, the method comprising:
- receiving, at an amplifier of the reference circuit, a first signal from a reference voltage source;
- receiving, at the amplifier of the reference circuit, a second signal from a power supply;
- outputting, by the amplifier of the reference circuit, a voltage reference to an analog-to-digital converter, ADC;
- and
- controlling a power supply to the amplifier by feeding back a control signal representative of an operational phase of the ADC to the power supply.
A reference circuit, comprising:
- an amplifier configured to act as a voltage amplifier, the amplifier having a first input configured to receive a first signal from a reference voltage source, a second input configured to receive a second signal from a power supply, and an output configured to provide a voltage reference to an analog-to-digital converter, ADC,
- wherein a control signal representative of an operational phase of the ADC is configured to be fed back to the power supply in order to control a power supply to the amplifier.
Dependencies are inferred from the claim text.