Semiconductor device

A semiconductor device comprising:

• a substrate including a chip region and a scribe lane region, the scribe lane region including a chip adjacent region, a chip adjacent crossing region that abuts the chip adjacent region, and a peripheral crossing region that abuts the chip adjacent crossing region and is spaced apart from the chip adjacent region;
• row trenches disposed in the chip adjacent crossing region in a direction that crosses a first boundary;
• and
• column trenches disposed in the chip adjacent crossing region in a direction that crosses a second boundary crossing the first boundary,
• wherein each of the row trenches and each of the column trenches do not cross each other.

A semiconductor device comprising:

• a substrate including a chip region and a scribe lane region, the scribe lane region including a chip adjacent region, a chip adjacent crossing region that abuts the chip adjacent region, and a peripheral crossing region that abuts the chip adjacent crossing region and is spaced apart from the chip adjacent region;
• a passivation layer on the substrate;
• row trenches disposed in the passivation layer outside of the peripheral crossing region between a first boundary that marks an outer edge of the peripheral crossing region and a second boundary that marks an outer edge of the chip region, wherein at least one of the row trenches is disposed in the chip adjacent crossing region;
• and
• column trenches disposed in the passivation layer outside of the peripheral crossing region between a third boundary, perpendicular to the first boundary, that marks an outer edge of the peripheral crossing region and a fourth boundary, perpendicular to the second boundary, that marks an outer edge of the chip region, wherein at least one of the column trenches is disposed in the chip adjacent crossing region.