Semiconductor device and method for forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorHung-Te Lin
Life of this patent
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Abstract
Methods for forming bias-controlled silicon-on-insulator (SOI) regions are disclosed, along with such substrates and integrated circuits thereon. A trench is formed in a base substrate, and a pickup channel is formed therein. A buried dielectric layer is formed over the pickup channel, and a semiconducting substrate is formed over the buried dielectric layer. A central layer of the pickup channel extends through the buried dielectric layer and is electrically connected to the semiconducting substrate. Other integrated circuits can be formed on the base substrate as well. This results in flexible design layouts.
Claims20
A method, comprising:
- forming a first trench in a first silicon-on-insulator (SOI) region of a substrate;
- doping a base and at least one sidewall of the first trench with a first dopant type to form at least one pickup channel;
- doping a layer within the first trench with a primary dopant around one or more central regions of the first trench;
- doping the one or more central regions of the first trench with the first dopant type to form one or more central layers electrically connected to the at least one pickup channel;
- forming a first buried dielectric layer from the primary dopant-doped layer of the first trench;
- and
- filling the first trench to form a first semiconducting substrate above the first buried dielectric layer, wherein the one or more central layers are electrically connected to the first semiconducting substrate.
A structure, comprising:
- a first bias-controlled SOI region of a substrate, the first bias-controlled SOI region comprising:
- a buried dielectric layer within the substrate;
- at least one pickup channel comprising a bottom layer located below the buried dielectric layer and at least one sidewall extending upwards to an upper surface of the substrate;
- a semiconducting substrate above the buried dielectric layer;
- and
- one or more central layers extending through the buried dielectric layer and electrically connected to the at least one pickup channel and to the semiconducting substrate.
A method, comprising:
- forming a trench in an SOI region of a base substrate;
- implanting a first dopant type in a bottom layer and at least one sidewall of the trench to form a first pickup channel;
- implanting a second dopant type in the bottom layer and at least one sidewall of the trench to form a second pickup channel;
- implanting a primary dopant into a layer of the trench around a first central region over the first pickup channel and a second central region over the second pickup channel;
- implanting the first dopant type into the first central region to form a first central layer electrically connected to the first pickup channel;
- implanting the second dopant type into the second central region to form a second central layer electrically connected to the second pickup channel;
- annealing to form a buried dielectric layer from the primary dopant-doped layer of the trench;
- filling the trench to form a semiconducting substrate above the buried dielectric layer, wherein the first central layer and the second central layer are electrically connected to the semiconducting substrate;
- doping the semiconductor substrate above the first central layer with the first dopant type to form a first doped well;
- doping the semiconductor substrate above the second central layer with the second dopant type to form a second doped well;
- and
- forming an isolation region between the first doped well and the second doped well.
Dependencies are inferred from the claim text.