Semiconductor device and manufacturing method thereof

A method for manufacturing a semiconductor device, comprising:

• S1:
• providing a semiconductor structure, forming a first well region of a first dopant type and a second well region of the first dopant type spaced apart at an interval on an upper surface of the semiconductor structure, and forming a first doping region of a second dopant type and a second doping region of the second dopant type spaced apart on an upper surface of the first well region;
• S2:
• forming a groove on the upper surface of the first well region crossing from the first doping region to the second doping region, wherein two sidewalls of the groove extend into the first doping region and the second doping region, respectively;
• S3:
• filing the groove to form a gate dielectric layer, and synchronously forming a first dummy gate structure comprising a first dummy gate layer and a second dummy gate structure comprising a second dummy gate layer, wherein the first dummy gate structure is located directly above a region between the first doping region and the second doping region and comprises the gate dielectric layer, and the second dummy gate structure is located on an upper surface of the second well region;
• S4:
• simultaneously forming a first source region of the second dopant type, a first drain region of the second dopant type, a second source region of the second dopant type, and a second drain region of the second dopant type, wherein the first source region is located on an upper surface of the first doping region, the first drain region is located on an upper surface of the second doping region, and the second source region and the second drain region are respectively located at two sides of the second dummy gate structure on the upper surface of the second well region;
• and
• S5:
• replacing the first dummy gate layer within the first dummy gate structure with a first metal gate layer and replacing the second dummy gate layer within the second dummy gate structure with a second metal gate layer, respectively, and forming electrodes electrically connected to the first source region, the first drain region, the first metal gate layer, the second source region, the second drain region, and the second metal gate layer, respectively.