Structures and methods for self-aligned gate-drain overlap trench mosfets

A method of forming a semiconductor device, comprising:

• providing a region of semiconductor material comprising a first major surface and a first conductivity type;
• providing a trench gate structure comprising:
• a trench extending from the first major surface into the region of semiconductor material;
• a shield dielectric layer adjacent to a lower portion of the active trench;
• a shield electrode adjacent to the shield dielectric layer, the shield electrode comprising a first polycrystalline semiconductor material;
• a gate dielectric layer adjacent to an upper portion of the active trench;
• a gate electrode adjacent to the gate dielectric layer, the gate electrode comprising a second polycrystalline semiconductor material;
• a gate conductive layer adjacent to the gate electrode;
• a dielectric fill structure in the active trench electrically isolating the gate electrode and the gate conductive layer from the shield electrode;
• providing a body region of a second conductivity type opposite the first conductivity types in the region of semiconductor material extending from the major surface adjacent to the trench gate structure;
• wherein the body region has a bottom edge, and a width of the body region above the bottom edge is substantially greater than a width of the semiconductor material below the bottom edge;
• and
• providing a source region of the first conductivity type in the body region adjacent to the trench gate structure.

A semiconductor device comprising:

• a region of semiconductor material comprising a first major surface and a first conductivity type;
• a trench gate structure comprising:
• a trench extending from the first major surface into the region of semiconductor material;
• a shield dielectric layer adjacent to a lower portion of the trench;
• a shield electrode adjacent to the shield dielectric layer in the lower portion of the active trench, the shield electrode comprising a first polycrystalline semiconductor material;
• a gate dielectric layer adjacent to an upper portion of the trench;
• a gate electrode adjacent to the gate dielectric layer in the upper portion of the active trench, the gate electrode comprising a second polycrystalline semiconductor material;
• a gate conductive layer adjacent to the gate electrode;
• a dielectric fill structure in the trench electrically isolating the gate electrode and the gate conductive layer from the shield electrode;
• a body region of a second conductivity type opposite that of the first conductivity type in the region of semiconductor material extending from the major surface adjacent to the trench gate structure, wherein the body region comprises at least a portion of epitaxially grown semiconductor material forming a semiconductor mesa overhang region such that a width of the body region above the semiconductor mesa overhang region is substantially greater than a width of the semiconductor material below the semiconductor mesa overhang region;
• and
• a source region of the first conductivity type adjacent to the body region.