Semiconductor structure and fabrication method thereof
AssigneeNanya Technology Corporation
InventorYing-Cheng Chuang
Life of this patent
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Abstract
A semiconductor structure is provided. The semiconductor structure includes a carrier substrate, a semiconductor fin structure, a gate insulation layer, and a gate structure. The semiconductor fin structure is disposed over the carrier substrate and extending along a first direction. A width of the semiconductor fin structure varies along a second direction perpendicular to a top surface of the carrier substrate, with a widest portion of the semiconductor fin structure located at a middle of the semiconductor fin structure. The gate insulation layer is disposed on the semiconductor fin structure. The gate structure is disposed on the gate insulation layer.
Claims10
A semiconductor structure, comprising:
- a carrier substrate;
- a semiconductor fin structure, disposed over the carrier substrate and extending along a first direction, wherein a width of the semiconductor fin structure varies along a second direction perpendicular to a top surface of the carrier substrate, with a widest portion of the semiconductor fin structure located at a middle of the semiconductor fin structure;
- a gate insulation layer, disposed on the semiconductor fin structure;
- and
- a gate structure, disposed on the gate insulation layer.
A fabrication method of a semiconductor structure, comprising:
- forming a semiconductor layer over a carrier substrate;
- etching the semiconductor layer to form a semiconductor strip extending along a first direction over the carrier substrate, wherein the semiconductor strip has sidewalls perpendicular to a top surface of the carrier substrate;
- heating the semiconductor strip in a hydrogen ambient, causing a shape of the semiconductor strip to transform into a semiconductor fin structure, wherein a width of the semiconductor fin structure varies along a second direction perpendicular to the top surface of the carrier substrate, with a widest portion located at a middle of the semiconductor fin structure;
- forming a gate insulation layer on the semiconductor fin structure;
- and
- forming a gate structure on the gate insulation layer.
Dependencies are inferred from the claim text.