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US 2026/0239652 A1Published application
High Electron Mobility Transistor and Method for Manufacturing Same
AssigneeMicrochip Technology Incorporated
InventorShesh Mani Pandey
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Abstract
A High-Electron-Mobility-Transistor comprising an upper insulating layer formed over a third buffer layer formed over a third barrier layer formed over a second buffer layer formed over a second barrier layer formed over a first buffer layer formed over a first barrier layer formed over a first doped structure and formed over a substrate. A second doped structure formed within the third barrier layer. A first gate electrode connected to the first doped structure. A second gate electrode connected to the second doped structure. A drain terminal formed at a first side of the first gate electrode. A source terminal formed at a second side of the first gate electrode.
Claims20
A High-Electron-Mobility-Transistor comprising:
- a substrate;
- a first doped structure formed within the substrate;
- a first barrier layer formed over the first doped structure and formed over the substrate;
- a first buffer layer formed over the first barrier layer;
- a second barrier layer formed over the first buffer layer;
- a second doped structure formed over the second barrier layer;
- a second buffer layer formed over the second barrier layer;
- a third barrier layer formed over the second buffer layer and formed over the second doped structure, the third barrier layer surrounds the second doped structure;
- a third buffer layer formed over the third barrier layer;
- an upper insulating layer formed over the third buffer layer;
- a first spacer formed on a portion of the first doped structure through the first barrier layer, through the first buffer layer, through the second barrier layer, through the second buffer layer, through the third barrier layer, through the third buffer layer and through the upper insulating layer;
- a second spacer formed on a portion of the second doped structure partially through an upper portion of the third barrier layer, through the third buffer layer and through the upper insulating layer;
- a first gate electrode formed through the upper insulating layer, within the first spacer through the third buffer layer, through the third barrier layer, through the second buffer layer, through the second barrier layer, through the first buffer layer, through the first barrier layer, the first gate electrode connected to the first doped structure;
- a second gate electrode formed through the upper insulating layer, within the second spacer through the third buffer layer and partially into the upper portion of the third barrier layer, the second gate electrode connected to the second doped structure;
- a drain terminal formed at a first side of the first gate electrode;
- and
- a source terminal formed at a second side of the first gate electrode.
14 more elements
A method for producing a High-Electron-Mobility-Transistor comprising:
- providing a substrate;
- forming a first doped structure within the substrate;
- forming a first barrier layer over the first doped structure and over the substrate;
- forming a first buffer layer over the first barrier layer;
- forming a second barrier layer over the first buffer layer;
- forming a second doped structure over the second barrier layer;
- forming a second buffer layer over the second barrier layer;
- forming a third barrier layer over the second buffer layer and over the second doped structure, the third barrier layer surrounds the second doped structure;
- forming a third buffer layer over the third barrier layer;
- forming an upper insulating layer over the third buffer layer;
- forming a first spacer on a portion of the first doped structure through the first barrier layer, through the first buffer layer, through the second barrier layer, through the second buffer layer, through the third barrier layer, through the third buffer layer and through the upper insulating layer;
- forming a second spacer on a portion of the second doped structure partially through an upper portion of the third barrier layer, through the third buffer layer and through the upper insulating layer;
- forming a first gate electrode through the upper insulating layer, within the first spacer through the third buffer layer, through the third barrier layer, through the second buffer layer, through the second barrier layer, through the first buffer layer, through the first barrier layer, the first gate electrode connected to the first doped structure;
- forming a second gate electrode through the upper insulating layer, within the second spacer through the third buffer layer and partially into the upper portion of the third barrier layer, the second gate electrode connected to the second doped structure;
- forming a drain terminal at a first side of the first gate electrode;
- and
- forming a source terminal at a second side of the first gate electrode.
14 more elements
Dependencies are inferred from the claim text.