Semiconductor device including memory cell including thyristor and method of manufacturing the same

A method of manufacturing a semiconductor device, the method comprising:

• forming a cell stack structure on a substrate, the cell stack structure including a base sacrificial layer and a gate sacrificial layer that are stacked in a direction substantially perpendicular to a surface of the substrate;
• forming first and second hole patterns penetrating the cell stack structure on the substrate, the first and second hole patterns being disposed to be spaced apart from each other in a lateral direction substantially parallel to the surface of the substrate;
• selectively recessing the base sacrificial layer in the first hole pattern to form a first base recess space;
• forming a first base device layer in the first base recess space;
• forming a first shared device layer on an inner wall of the first hole pattern;
• forming a first pillar electrode in the first hole pattern;
• selectively recessing the base sacrificial layer in the second hole pattern to form a second base recess space and exposing the first base device layer;
• forming a second base device layer in the second base recess space;
• forming a second shared device layer on an inner surface of the second hole pattern;
• and
• forming a second pillar electrode in the second hole pattern.