Semiconductor storage device

A semiconductor storage device comprising:

• a first wiring;
• a second wiring;
• a memory cell configured to be electrically connected to the first wiring and the second wiring between the first wiring and the second wiring;
• a sense amplifier configured to be electrically connected to the second wiring and configured to perform a read operation on the memory cell;
• and
• a control circuit,
• wherein the control circuit is configured to perform;
• a first read operation during a first sensing time in a first read period,
• a first write operation for writing the memory cell having undergone the first read operation to a first state in the first write period,
• a second read operation during a second sensing time different from the first sensing time on the memory cell having undergone the first write operation in a second read period, and
• a discrimination operation of a state of the memory cell by comparing a first read result obtained by the first read operation with a second read result obtained by the second read operation in a discrimination period.