Power management integrated circuit and memory module includng the same

A power management integrated circuit (PMIC) comprising:

• an internal output transistor configured to receive an external voltage and output an internal output voltage from the external voltage via an output node of the PMIC when the external voltage is less than a first threshold voltage of the internal output transistor;
• and
• a clamp transistor configured to output the internal output voltage from a clamp voltage via the output node of the PMIC when the external voltage exceeds the first threshold voltage,
• wherein the first threshold voltage is a sum of a threshold volage of the internal output transistor, a turn-on threshold voltage of a sensing Zener diode and a switching voltage of the internal output transistor.

A power management integrated circuit (PMIC) comprising:

• an internal output transistor configured to output an internal output voltage from an external voltage to a device;
• and
• a clamp transistor configured to output the internal output voltage from a clamp voltage to the device,
• wherein the PMIC is configured to:
• in a normal mode and an overvoltage sensing mode, turn on the internal output transistor and turn off the clamp transistor, and
• in clamp modes, turn off the internal output transistor and turn on the clamp transistor, and
• wherein the internal output voltage has a uniform level in a first clamp mode of the clamp modes when the external voltage exceeds a first threshold voltage.