Electronic device and method

A processor-implemented method comprising:

• acquiring a data set for a plurality of factors, which is associated with a semiconductor fabrication process, of a plurality of chips included in a wafer;
• generating a first sub-data set corresponding to a first area among a plurality of areas in the wafer by dividing the data set based on a plurality of areas determined by clustering the plurality of chips;
• identifying, from among the plurality of factors, one or more factors satisfying a condition that is set for the first sub-data set;
• and
• learning a first estimation model corresponding the first area based on a second sub-data set for the one or more factors of a chip included in the first area.

A processor-implemented method comprising:

• identifying an area corresponding to location data that is a subject of defect estimation among a plurality of areas included in a wafer;
• identifying an estimation model corresponding to the area among a plurality of estimation models individually corresponding to the plurality of areas;
• and
• estimating whether a pattern corresponding to the location data is a defective pattern based on the estimation model.