Dual-Mode Access to Argument Registers in a Shift-Register-Based Configuration Data Store

A configurable unit for use in a reconfigurable processor, comprising:

• a configuration data store organized as a shift register, the shift register comprising individually addressable argument registers that form non-overlapping portions of the shift register;
• program load logic configured to receive sub-files of configuration data via a bus system and to load the received sub-files into the configuration data store by sequentially shifting the received sub-files into the shift register;
• and
• argument load logic configured to receive argument data via the bus system and to write the argument data directly into one or more of the individually addressable argument registers without shifting the argument data through the shift register, such that data stored in portions of the shift register other than the one or more argument registers being written is not changed.

A reconfigurable processor, comprising:

• an array of configurable units connected by a bus system, each configurable unit comprising a configuration data store organized as a shift register that includes individually addressable argument registers forming non-overlapping portions of the shift register, program load logic configured to load received sub-files of configuration data into the configuration data store by sequentially shifting the sub-files into the shift register, and argument load logic configured to write argument data directly into one or more of the individually addressable argument registers without shifting the argument data through the shift register and without changing data in other portions of the shift register;
• a program load controller associated with the array and configured to respond to a program load command by broadcasting a first signal to the configurable units and distributing sub-files of a configuration file to the configurable units;
• and
• a fast argument load controller associated with the array and configured to respond to an argument load command by broadcasting a second signal to the configurable units and distributing argument values to addressed configurable units in the array.