Data transmission method, device, chiplet, readable storage medium, and program product

A data transmission device, comprising:

• a first receiver, compatible with an external interface of a coherent interconnection bus of a chiplet and configured to receive a first data from the coherent interconnection bus;
• a first conversion circuit, connected to the first receiver and configured to perform first conversion on the first data received by the first receiver;
• a first transmitter, connected to the first conversion circuit and compatible with an external interface of a Die to Die (DTD) circuit, and configured to send the converted first data to the DTD circuit;
• a second receiver, compatible with an external interface of the DTD circuit and configured to receive a second data from the DTD circuit;
• a second conversion circuit, connected to the second receiver and configured to perform second conversion on the second data received by the second receiver;
• and
• a second transmitter, connected to the second conversion circuit and compatible with an external interface of the coherent interconnection bus and configured to send the converted second data to the coherent interconnection bus.

A chiplet, comprising a coherent interconnection bus, a data transmission device, a Die to Die (DTD) circuit, a memory, and a processor, wherein the memory stores a computer program, when executed by the processor causing the processor to perform a method, the method comprising:

• receiving a first data from the coherent interconnection bus via a first receiver, the first receiver being compatible with an external interface of the coherent interconnection bus;
• performing first conversion on the first data, and sending the converted first data to the DTD circuit via a first transmitter, the first transmitter being compatible with an external interface of the DTD circuit;
• receiving a second data from the DTD circuit via a second receiver, the second receiver being compatible with an external interface of the DTD circuit;
• and
• performing second conversion on the second data, and sending the converted second data to the coherent interconnection bus via a second transmitter, the second transmitter being compatible with an external interface of the coherent interconnection bus.