Methods and system with dynamic ecc voltage and frequency
AssigneeLodestar Licensing Group LLC
InventorsJonathan Scott Parry, Nadav Grosz, David Aaron Palmer, Christian M. Gyllenskog
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Abstract
Apparatus and methods are disclosed, including using a memory controller to monitor at least one parameter related to power level of a host processor of a host device, and dynamically adjusting at least one of a clock frequency and a voltage level of an error-correcting code (ECC) subsystem of the memory controller based on the at least one parameter to control power usage of the host device.
Claims20
A storage system, comprising:
- a memory array;
- and
- a memory controller that comprises an error-correcting code (ECC) subsystem and that is configured to:
- communicate with a host processor to implement interactions between the host processor and the memory array;
- monitor a bit error rate or wear of at least a portion of the storage system;
- and
- limit power consumption of the ECC subsystem of the memory controller based at least in part on the monitored bit error rate or wear to control power usage of the host processor.
A non-transitory, computer-readable medium comprising instructions thereon that, when executed by a memory controller, cause the memory controller to perform operations comprising:
- monitoring a bit error rate or wear related to processing speed of a host processor of a host device configured to communicate with the memory controller;
- and
- limiting power consumption of an error-correcting code (ECC) subsystem of the memory controller based on the bit error rate or wear to control power usage of the host device.
A storage system, comprising:
- a memory array;
- monitoring circuitry configured to monitor bit error rate or wear of the memory array;
- and
- a memory controller that comprises an error-correcting code (ECC) subsystem and that is configured to:
- monitor the bit error rate or wear via the monitoring circuitry;
- and
- limit power consumption of the ECC subsystem of the memory controller based at least in part on the monitored bit error rate or wear.
Dependencies are inferred from the claim text.