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US 2026/0236265 A1Published application
System on chip, instruction system, compilation system, and related product
AssigneeShanghai Cambricon Information Technology Co., Ltd.
InventorsZhenxing ZHANG, Shaoli LIU
Life of this patent
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Abstract
The present disclosure provides an SoC, an instruction system, a compilation system and related products. The SoC includes a plurality of heterogeneous IP cores. By managing heterogeneous IP cores as execution units in a hardware pipeline, the solution of the present disclosure hides the heterogeneity of the IP cores, thereby improving programming efficiency and hardware utilization.
Claims20
A system on chip (SoC), comprising:
- a system controller configured to manage a hardware pipeline, comprising fetching an instruction from a system memory, decoding and dispatching the instruction;
- and
- a plurality of heterogeneous IP cores constituting execution units in the hardware pipeline for executing the instruction dispatched by the system controller.
A board card, comprising the an SoC, wherein the SoC comprises:
- a system controller configured to manage a hardware pipeline, comprising fetching an instruction from a system memory, decoding and dispatching the instruction;
- and
- a plurality of heterogeneous IP cores constituting execution units in the hardware pipeline for executing the instruction dispatched by the system controller.
Dependencies are inferred from the claim text.