Low dropout (ldo) nfet voltage regulator using thin oxide devices

A low dropout (LDO) voltage regulator, comprising:

• a first p-channel field effect transistor (PFET) including a gate configured to receive a first control signal;
• a second PFET including a gate configured to receive a first bias voltage;
• a first n-channel field effect transistor (NFET), wherein the first PFET, the second PFET, and the first NFET are coupled in series between a first upper voltage rail and an output of the LDO voltage regulator;
• an operational amplifier including a first input configured to receive a reference voltage;
• a voltage boost circuit including an input coupled to an output of the operational amplifier and an output coupled to a gate of the first NFET;
• a second NFET including a gate configured to receive a second bias voltage;
• and
• a third NFET coupled in series with the second NFET between a node a lower voltage rail, wherein the node is between the second PFET and the first NFET, wherein the third NFET includes a gate configured to receive a second control signal.