US 2026/0235675 A1 · SEMICONDUCTOR DEVICE AND METHOD OF INSPECTING SEMICONDUCTOR DEVICE

Abstract

One aspect of the present disclosure relates to a method of inspecting a semiconductor device including a plurality of processors each of which has a scan chain. The method comprises: first determining including: inputting scan signals to the plurality of processors; and determining whether a failure occurs in any of the plurality of processors based on output signals of the plurality of processors and an expectation value corresponding to the scan signals; and second determining including: inputting the scan signal to a part of the plurality of processors in a case where the first determining determines that the failure occurs; and determining whether the failure occurs in the part of the plurality of processors based on the expectation value and an output signal of the part of the plurality of processors.

Claims18

Dependent claims

A method of inspecting a semiconductor device including a plurality of processors each of which has a scan chain, the method comprising:

first determining including:
inputting scan signals to the plurality of processors;
and
determining whether a failure occurs in any of the plurality of processors based on output signals of the plurality of processors and an expectation value corresponding to the scan signals;
and
second determining including:
inputting the scan signal to a part of the plurality of processors in a case where the first determining determines that the failure occurs;
and
determining whether the failure occurs in the part of the plurality of processors based on the expectation value and an output signal of the part of the plurality of processors.

6 more elements

A semiconductor device comprising:

a plurality of processors each of which has a scan chain;
a redundant processor to be replaced with the processor having a failure, the redundant processor having a configuration corresponding to the processor;
a scan expander that expands an input signal to a plurality of scan signals;
a scan compressor that receives a plurality of output signals corresponding to the plurality of scan signals from the plurality of processors and the redundant processor, and output the plurality of output signals as a single signal;
a plurality of input signal paths that transmits the plurality of scan signals from the scan expander to the plurality of processors and the redundant processor;
a plurality of output signal paths that transmits the plurality of output signals from the plurality of processors and the redundant processor to the scan compressor;
and
a plurality of bypasses used to transmit the plurality of scan signals from the scan expander to the scan compressor by detouring around the plurality of processors.

5 more elements

Dependencies are inferred from the claim text.

Semiconductor device and method of inspecting semiconductor device

Life of this patent

Semiconductor device and method of inspecting semiconductor device

Life of this patent

Abstract

Claims18