Clock gating based on care bits in scan chains for reduced clock power during scan automatic test pattern generation
OwnerArshdeep Singh, Navaneeth R +1inventors
InventorsArshdeep Singh, Navaneeth R, Vishal Diwan
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Abstract
An electronic device includes a scan chain having a scan chain data input and storage elements with respective storage element clock inputs, a pattern gating circuit having a pattern gating register, and a clock gating circuit configured to selectively prevent coupling of a system clock to the storage element clock inputs during a scan of the scan chain based on a value of the pattern gating register. A system includes automatic test equipment having a scan data output and the electronic device having a decompressor coupled to the scan data output of the ATE with the pattern gating circuit coupled to the scan data output of the decompressor.
Claims20
An electronic device, comprising:
- a scan chain having a scan chain data input and storage elements with respective storage element clock inputs;
- a pattern gating circuit having a pattern gating register;
- and
- a clock gating circuit configured to selectively prevent coupling of a system clock to the storage element clock inputs during a scan of the scan chain based on a value of the pattern gating register.
A system, comprising:
- automatic test equipment (ATE) having a scan data output;
- and
- a tested device, including:
- a decompressor coupled to the scan data output of the ATE;
- a scan chain having a scan chain data input and storage elements with respective storage element clock inputs;
- a pattern gating circuit coupled to the scan data output of the decompressor and having a pattern gating register;
- and
- a clock gating circuit configured to selectively prevent coupling of a system clock to the storage element clock inputs during a scan of the scan chain based on a value of the pattern gating register.
A method of manufacturing a tested electronic device, the method comprising:
- selectively gating a scan chain data input of a scan chain of the electronic device based on a value of a pattern gating register of the electronic device;
- and
- selectively gating storage element clock inputs of the scan chain based on the value of the pattern gating register.
Dependencies are inferred from the claim text.