3d semiconductor device and structure with metal layers
AssigneeMonolithic 3D Inc.
InventorsZvi Or-Bach, Brian Cronquist
Life of this patent
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Abstract
A 3D semiconductor device, the device including: a first level including a first single crystal layer, the first level including a plurality of first metal layers; a second level overlaying the plurality of first metal layers, the second level including a second single crystal layer, a plurality of transistors, and a plurality of second metal layers, where at least one of the plurality of transistors includes a metal gate, where the second single crystal layer thickness is less than 2 microns, where the plurality of transistors includes one or more transistors with a first Threshold Voltage (Vt1), where the plurality of transistors includes one or more transistors with a second Threshold Voltage (Vt2), and where Vt1 is greater than Vt2.
Claims20
A 3D semiconductor device, the device comprising:
- a first level comprising a first single crystal layer, said first level comprising a plurality of first metal layers;
- a second level overlaying said plurality of first metal layers, said second level comprising a second single crystal layer, a plurality of transistors, and a plurality of second metal layers,
- wherein at least one of said plurality of transistors comprises a metal gate,
- wherein said second single crystal layer thickness is less than 2 microns,
- wherein said plurality of transistors comprises one or more transistors with a first Threshold Voltage (Vt1),
- wherein said plurality of transistors comprises one or more transistors with a second Threshold Voltage (Vt2), and
- wherein Vt1 is greater than Vt2.
A 3D semiconductor device, the device comprising:
- a first level comprising a first single crystal layer, said first level comprising a plurality of first metal layers;
- a second level overlaying said plurality of first metal layers, said second level comprising a second single crystal layer, a plurality of transistors, and a plurality of second metal layers,
- wherein at least one of said plurality of transistors comprises a metal gate,
- wherein said second single crystal layer thickness is less than 2 microns;
- and
- a power supply circuit.
A 3D semiconductor device, the device comprising:
- a first level comprising a first single crystal layer, said first level comprising a plurality of first metal layers;
- a second level overlaying said plurality of first metal layers, said second level comprising a second single crystal layer, a plurality of transistors, and a plurality of second metal layers,
- wherein at least one of said plurality of transistors comprises a metal gate,
- wherein said second single crystal layer thickness is less than 2 microns, and
- wherein at least one of said plurality of transistors comprises a strained silicon channel.
Dependencies are inferred from the claim text.