Method for forming a source/drain contact for a transistor
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYi-Ju CHEN, Chun Ting LEE, Che-Chia CHANG, Yi-Hsin TING, Yi-Ren CHEN, Chun-Sheng LIANG
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Abstract
A method is provided for forming a source/drain contact for a transistor on a semiconductor substrate. The method includes a step of forming a recess in a source/drain feature of the transistor, a step of implanting dopants toward a bottom of the recess at a reference angle relative to a reference direction, and toward a sidewall of the recess at an angle that is different from the reference angle relative to the reference direction, and a step of forming a metal contact over the source/drain feature after implanting the dopants.
Claims20
A method for forming a source/drain contact for a transistor on a semiconductor substrate, comprising:
- forming a recess in a source/drain feature of the transistor;
- implanting dopants toward a bottom of the recess at a reference angle relative to a reference direction, and toward a sidewall of the recess at a first doping tilt angle that is different from the reference angle relative to the reference direction;
- and
- forming a metal contact over the source/drain feature after implanting the dopants.
A method for forming a source/drain contact for a transistor on a semiconductor substrate, the transistor including a plurality of channel layers spaced apart from each other and stacked together, said method comprising:
- etching a source/drain feature of the transistor that is connected to the plurality of channel layers, thereby forming a recess in the source/drain feature, where the recess has a bottom surface that is lower than a top surface of a second one from a top of the plurality of channel layers;
- emitting pre-amorphization implant (PAI) particle beams to the source/drain feature at a reference angle toward a bottom surface of the recess, at a first PAI tilt angle toward a first sidewall of the recess, and at a second PAI tilt angle toward a second sidewall of the recess that is opposite to the first sidewall;
- after the emitting of the PAI particle beams, implanting dopants to the source/drain feature at the reference angle toward the bottom surface of the recess, at a first doping tilt angle toward the first sidewall of the recess, and at a second doping tilt angle toward the second sidewall of the recess;
- and
- after the implanting of the dopants, forming a metal contact over the source/drain feature.
A semiconductor device, comprising:
- a plurality of channel layers disposed on a semiconductor substrate, spaced apart from each other, and stacked together;
- a gate feature surrounding the plurality of channel layers;
- a first source/drain feature connected to the plurality of channel layers;
- a second source/drain feature spaced apart from the first source/drain feature and connected to the plurality of channel layers;
- a first metal contact extending into the first source/drain feature, and overlapping at least two of the plurality of channel layers in a direction parallel to a surface of the semiconductor substrate;
- and
- a second metal contact disposed over the second source/drain feature;
- wherein the first source/drain feature has a bulk portion, and an arm portion extending from the bulk portion and disposed between the first metal contact and the at least two of the plurality of channel layers, and the arm portion has a dopant concentration greater than a dopant concentration in the bulk portion.
Dependencies are inferred from the claim text.