Power converter, controller, and method with overcurrent protection

A method that comprises:

• producing a PWM signal based on a voltage of an output node;
• converting the PWM signal into (i) a high side control signal for a high side switch configured to increase an inductor current coupled to the output node when the high side control signal is asserted, and (ii) a low side control signal for a low side switch configured to decrease the inductor current when the low side control signal is asserted, the converting including:
• using a high side positive overcurrent detector to disable assertion of the high side control signal and to enable assertion of the low side control signal for a first interval if the inductor current exceeds a first threshold during assertion of the PWM signal;
• using a low side positive overcurrent detector to disable assertion of the high side control signal and to enable assertion of the low side control signal for a second interval if the inductor current exceeds a second threshold during de-assertion of the PWM signal;
• and
• using a low side negative overcurrent detector to disable assertion of the low side control signal for a third interval if the inductor current falls below a third threshold.

A controller that comprises:

• a feedback circuit configured to produce a pulse width modulated (PWM) signal based on a voltage of an output node;
• and
• an overcurrent protection (OCP) circuit configured to convert the PWM signal into (i) a high side control signal for a high side switch configured to increase an inductor current to the output node when the high side control signal is asserted, and (ii) a low side control signal for a low side switch configured to decrease the inductor current and into the low side control signal, the OCP circuit including:
• a high side positive overcurrent detector configured to disable assertion of the high side control signal and enable assertion of the low side control signal for a first interval if the inductor current exceeds a first threshold during assertion of the PWM signal;
• a low side positive overcurrent detector configured to disable assertion of the high side control signal and enable assertion of the low side control signal for a second interval if the inductor current exceeds a second threshold during de-assertion of the PWM signal;
• and
• a low side negative overcurrent detector configured to disable assertion of the low side control signal for a third interval if the inductor current falls below a third threshold.