Memory device and operating method of the same

A memory device, comprising:

• a cell array comprising at least one memory cell that is electrically coupled between a bit line and a word line, the bit line being electrically coupled to a global bit line, the word line being electrically coupled to a global word line;
• a control circuit configured to control one or more of a first pre-selection operation, a second pre-selection operation, and a write operation, in response to a write command received;
• a voltage supply circuit configured to provide a first pre-selection operation voltage to the global bit line and a second pre-selection operation voltage to the global word line after a start of the first pre-selection operation;
• and
• a sense amplifier configured to provide the control circuit with information indicating whether the memory cell has been turned on in response to at least one of the first or the second pre-selection operation.

A method for operating a non-volatile memory device, the method comprising:

• receiving a write command for a memory cell;
• performing a first pre-selection operation on the memory cell;
• performing a second pre-selection operation on the memory cell if the memory cell does not exhibit a conductive state in response to the first pre-selection operation;
• performing the write operation on the memory cell if the memory cell exhibits a conductive state in response to at least one of the first or second pre-selection operations;
• and
• classifying the memory cell as a failed cell if the memory cell does not exhibit a conductive state in response to the first and second pre-selection operations.