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AssigneeUnifabriX Ltd.
InventorsRonen Aharon Hyatt, Gaya Opal Hyatt, Ethan Sharon Hyatt, Gil Thieberger
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As AI clusters scale to hundreds or thousands of GPUs and accelerators, memory capacity and bandwidth increasingly become the bottleneck limiting model size, inference throughput, and training speed. A computer, coupled between a first NVLink-based interface and a second CXL interface, receives an NVLink-based request comprising a first physical address. The computer translates the first physical address to a second physical address, generates a CXL.mem M2S request comprising a read-class memory opcode and the second physical address, and sends the CXL.mem M2S request to a second entity. The computer receives a CXL.mem S2M DRS comprising data and returns an NVLink-based response comprising the data. The computer may further translate CXL.mem M2S requests to NVLink-based requests, enabling bidirectional memory access across NVLink and CXL protocol domains. This translation may facilitate GPU memory disaggregation, AI workloads utilizing CXL memory pools, and unified memory access between NVLink-coupled accelerators and CXL-attached memory resources.
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Dependencies are inferred from the claim text.