Cross-Fabric Bridging of CXL and UALink for Unified Memory Architecture Across Heterogeneous Protocol Boundaries

An apparatus comprising:

• a first interface configured to communicate according to Compute Express Link (CXL) with a first entity;
• a second interface configured to communicate according to an Ultra Accelerator Link Protocol Level Interface (UPLI) with a second entity;
• and
• a computer coupled between the first interface and the second interface, the computer configured to:
• translate a CXL request received from the first entity via the first interface to a UPLI request transmitted to the second entity via the second interface;
• and
• translate a UPLI response received from the second entity via the second interface to a CXL response transmitted to the first entity via the first interface.

A method comprising:

• executing, by a first accelerator, an inference workload on a neural network model;
• sending, by the first accelerator, a Compute Express Link (CXL) request for model data stored in a memory of a second accelerator, the CXL request comprising a first address;
• translating, by a computer, the CXL request to an Ultra Accelerator Link Protocol Level Interface (UPLI) request comprising a second address;
• sending the UPLI request to the second accelerator;
• receiving, from the second accelerator, a UPLI response comprising the model data;
• translating, by the computer, the UPLI response to a CXL response comprising the model data;
• and
• sending the CXL response to the first accelerator.

A system comprising:

• a first entity configured to communicate according to Compute Express Link (CXL);
• a switch;
• accelerators coupled to the switch and configured to communicate according to an Ultra Accelerator Link Protocol Level Interface (UPLI), wherein each accelerator of the accelerators comprises a local memory;
• and
• a computer coupled between the first entity and the switch, the computer configured to:
• translate a CXL request from the first entity to a UPLI request, and send the UPLI request to an accelerator of the accelerators via the switch;
• and
• translate a UPLI response from the accelerator to a CXL response, and send the CXL response to the first entity;
• wherein the first entity accesses at least portions of the local memory of at least two of the accelerators via the computer and the switch.