Devices using chiplet based storage architectures
AssigneeSK hynix Inc.
InventorDong Sop LEE
Life of this patent
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Abstract
A device for implementing a storage architecture includes a front-end chip configured to interface with a host device, and a plurality of back-end chips configured to interface with one or more memory devices. The front-end chip includes a plurality of front-end links and each of the plurality of back-end chips includes a back-end link configured to communicate with the corresponding front-end link. Each of the plurality of back-end chips comprises a controller configured to manage access to the one or more memory devices.
Claims20
A device for implementing a storage architecture, comprising:
- a front-end chip configured to interface with a host device;
- and
- a plurality of back-end chips configured to interface with one or more memory devices,
- wherein the front-end chip includes a plurality of front-end links, each front-end link being configured to communicate with a corresponding one of the plurality of back-end chips,
- wherein each of the plurality of back-end chips includes a back-end link configured to communicate with a corresponding front-end link,
- wherein the front-end chip and the plurality of back-end chips are physically separated from each other such that the storage architecture has a format different from a system-on-chip architecture,
- wherein each of the plurality of back-end chips comprises a controller configured to manage access to the one or more memory devices, and
- wherein the front-end chip and the plurality of back-end chips are configured to be independently replaceable from each other.
A device for implementing a storage architecture comprising:
- a front-end chip configured to interface with a host device;
- a back-end package coupled to the front-end chip;
- and
- a plurality of sub back-end packages coupled to the back-end package,
- wherein the front-end chip includes a front-end link configured to communicate with the back-end package,
- wherein the front-end chip and the back-end package are physically separated from each other such that the storage architecture has a format different from a system-on-chip architecture, and
- wherein the back-end package and the plurality of sub back-end packages are connected to each other in a daisy chain scheme.
Dependencies are inferred from the claim text.