US 2026/0227922 A1 · LINK STARTUP SEQUENCE MODE DETECTION FOR MEMORY SYSTEMS

Abstract

Methods, systems, and devices for link startup sequence (LSS) mode detection for memory systems are described. A memory system may determine a duration between signals associated with a LSS and may use the duration to determine whether the LSS is associated with a first speed mode or a second speed mode. In some examples, the memory system may perform the LSS in accordance with the determined speed mode in response to determining that the duration satisfies a threshold. Performing the LSS may involve initializing the memory system. Further, the memory system may initiate a timer in response to receiving a first signal and may stop the timer in response to receiving a second signal and determining that a channel has transitioned from a first state to a second state. The speed mode may be a low speed LSS mode or a high speed LSS mode.

Claims25

Dependent claims

A memory system, comprising:

one or more memory devices;
and
processing circuitry coupled with the one or more memory devices and configured to cause the memory system to:
receive a first signal and a second signal each associated with a link startup sequence;
determine whether the link startup sequence is associated with a first speed mode or a second speed mode in accordance with a duration between receiving the first signal and the second signal;
and
perform the link startup sequence in accordance with the first speed mode in response to determining that the duration between receiving the first signal and the second signal satisfies a first threshold.

4 more elements

A non-transitory computer-readable medium storing code comprising instructions which, when executed by processing circuitry of a memory system, cause the memory system to:

receive a first signal and a second signal each associated with a link startup sequence;
determine whether the link startup sequence is associated with a first speed mode or a second speed mode in accordance with a duration between receiving the first signal and the second signal;
and
perform the link startup sequence in accordance with the first speed mode in response to determining that the duration between receiving the first signal and the second signal satisfies a first threshold.

1 more element

Dependencies are inferred from the claim text.

Link startup sequence mode detection for memory systems

Life of this patent

Link startup sequence mode detection for memory systems

Life of this patent

Abstract

Claims25