High voltage isolation package

A method of forming a semiconductor package, comprising:

• providing a package substrate comprising a first metal pad and a second metal pad on a first surface of the package substrate;
• forming a first layer on the first surface of the package substrate and patterning the first layer to expose the first metal pad and the second metal pad and form one or more trenches in the first layer;
• attaching a first die and a second die on the first layer;
• and
• covering the first die, the second die, and the package substrate with a mold compound, wherein the one or more trenches locates between the first die and the second die.

A device, comprising:

• a printed circuit board (PCB);
• and
• a semiconductor package on the PCB, the semiconductor package comprising:
• a package substrate, comprising a first metal pad and a second metal pad on a first surface of the package substrate;
• a first layer on the first surface of the package substrate, comprising one or more trenches;
• a first die on the first layer and coupled to the first metal pad;
• a second die on the first layer and coupled to the second metal pad;
• and
• a mold compound covering the first die, the second die, and the package substrate and in contact with the one or more trenches, wherein the one or more trenches locates between the first die and the second die.