Fabrication of gate-all-around integrated circuit structures having common metal gates and having gate dielectrics with a dipole layer

An integrated circuit structure, comprising:

• a first conductivity-type device comprising a first vertical arrangement of horizontal nanowires, the first vertical arrangement of horizontal nanowires comprising silicon, and a first gate stack surrounding the nanowires of the first vertical arrangement of horizontal nanowires, the first gate stack comprising a first gate dielectric comprising lanthanum, hafnium and oxygen, and the first gate stack comprising a first gate electrode on the first gate dielectric, the first gate electrode comprising titanium;
• and
• a second conductivity-type device comprising a second vertical arrangement of horizontal nanowires, the second conductivity-type device different than the first conductivity-type device, and the second vertical arrangement of horizontal nanowires comprising silicon, and a second gate stack surrounding the nanowires of the second vertical arrangement of horizontal nanowires, the second gate stack comprising a second gate dielectric comprising aluminum, hafnium and oxygen, and the second gate stack comprising a second gate electrode on the second gate dielectric, the second gate electrode comprising titanium.

An integrated circuit structure, comprising:

• a first conductivity-type device comprising a first vertical arrangement of horizontal nanowires, the first vertical arrangement of horizontal nanowires comprising silicon, and a first gate stack surrounding the nanowires of the first vertical arrangement of horizontal nanowires, the first gate stack comprising a first gate dielectric comprising a first high-k layer comprising hafnium and oxygen, and a first dipole layer comprising lanthanum, and the first gate stack comprising a first gate electrode on the first gate dielectric, the first gate electrode comprising titanium;
• and
• a second conductivity-type device comprising a second vertical arrangement of horizontal nanowires, the second conductivity-type device different than the first conductivity-type device, and the second vertical arrangement of horizontal nanowires comprising silicon, and a second gate stack surrounding the nanowires of the second vertical arrangement of horizontal nanowires, the second gate stack comprising a second gate dielectric comprising a second high-k layer comprising hafnium and oxygen, and a second dipole layer comprising aluminum, and the second gate stack comprising a second gate electrode on the second gate dielectric, the second gate electrode comprising titanium.