High-voltage devices with extended tap active areas

A semiconductor layout, comprising:

• a first high-voltage semiconductor device comprising a first high-voltage N-well;
• a second high-voltage semiconductor device comprising a second high-voltage N-well, the second high-voltage semiconductor device positioned laterally adjacent to the first high-voltage semiconductor device;
• and
• a local deep trench isolation region positioned between the first high-voltage N-well and the second high-voltage N-well, wherein at least one of the first high-voltage semiconductor device or the second high-voltage semiconductor device comprises an active area that extends beyond a mask edge of its respective high-voltage N-well such that a region of the active area is positioned between the mask edge and the local deep trench isolation region.

An integrated high-voltage switch, comprising:

• a high-voltage p-type field effect transistor formed at least in part using a high-voltage N-well;
• a high-voltage depletion transistor positioned on a first side of the high-voltage N-well;
• a tap active area having a continuous region that extends across both the high-voltage p-type field effect transistor and the high-voltage depletion transistor;
• and
• a local deep trench isolation region positioned on a second side of the high-voltage N-well different from the first side, wherein the tap active area extends beyond a mask edge of the high-voltage N-well at the second side of the high-voltage N-well such that a region of the tap active area is positioned between the mask edge of the high-voltage N-well and the local deep trench isolation region.