US 2026/0223406 A1Published application

Semiconductor device

AssigneeSemiconductor Energy Laboratory Co., Ltd.

InventorsYukinori SHIMA, Masami JINTYOU, Junichi KOEZUKA

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Abstract

A semiconductor device including a transistor having a high on-state current is provided. The semiconductor device includes a transistor and a first insulating layer. The transistor includes first to third semiconductor layers, a first conductive layer, and a second conductive layer. The first insulating layer has a first opening reaching the first conductive layer. The second conductive layer includes a second opening in a region overlapping with the first opening. The first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a side surface of the second conductive layer. The second semiconductor layer is provided over the first semiconductor layer, and the third semiconductor layer is provided over the second semiconductor layer. The first semiconductor layer contains a first metal oxide, the second semiconductor layer contains a second metal oxide, and the third semiconductor layer contains a third metal oxide. A band gap of the first metal oxide is larger than a band gap of the second metal oxide. A band gap of the third metal oxide is larger than the band gap of the first metal oxide.

Claims7

Dependent claims

A semiconductor device comprising:

a transistor and a first insulating layer,
wherein the transistor comprises a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, and a second conductive layer,
wherein the first insulating layer is provided over the first conductive layer,
wherein the second conductive layer is provided over the first insulating layer,
wherein the first insulating layer comprises a first opening reaching the first conductive layer,
wherein the second conductive layer comprises a second opening in a region overlapping with the first opening,
wherein in the first opening and the second opening, the first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a side surface of the second conductive layer,
wherein the second semiconductor layer is provided over the first semiconductor layer,
wherein the third semiconductor layer is provided over the second semiconductor layer,
wherein the first semiconductor layer comprises a first metal oxide,
wherein the second semiconductor layer comprises a second metal oxide,
wherein the third semiconductor layer comprises a third metal oxide,
wherein a band gap of the first metal oxide is larger than a band gap of the second metal oxide,
wherein a band gap of the third metal oxide is larger than the band gap of the first metal oxide,
wherein a thickness of the third semiconductor layer is larger than a thickness of the first semiconductor layer, and
wherein a thickness of the second semiconductor layer is larger than the thickness of the third semiconductor layer.

13 more elements

A semiconductor device comprising:

a transistor and a first insulating layer,
wherein the transistor comprises a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, and a second conductive layer,
wherein the first insulating layer is provided over the first conductive layer,
wherein the second conductive layer is provided over the first insulating layer,
wherein the first insulating layer comprises a first opening reaching the first conductive layer,
wherein the second conductive layer comprises a second opening in a region overlapping with the first opening,
wherein in the first opening and the second opening, the first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a side surface of the second conductive layer,
wherein the second semiconductor layer is provided over the first semiconductor layer,
wherein the third semiconductor layer is provided over the second semiconductor layer,
wherein the first semiconductor layer comprises a first metal oxide,
wherein the second semiconductor layer comprises a second metal oxide,
wherein the third semiconductor layer comprises a third metal oxide,
wherein the first metal oxide comprises indium, a first element, and zinc,
wherein the second metal oxide comprises indium,
wherein the third metal oxide comprises indium, a second element, and zinc,
wherein the first element is one or more of gallium, aluminum, and tin,
wherein the second element is one or more of gallium, aluminum, and tin,
wherein a content percentage of the first element is higher than a sum of content percentages of gallium, aluminum, and tin in the second metal oxide,
wherein a content percentage of the second element is higher than the content percentage of the first element,
wherein a thickness of the third semiconductor layer is larger than a thickness of the first semiconductor layer, and
wherein a thickness of the second semiconductor layer is larger than the thickness of the third semiconductor layer.

18 more elements

A semiconductor device comprising:

a transistor and a first insulating layer,
wherein the transistor comprises a first semiconductor layer, a second semiconductor layer, a third semiconductor layer, a first conductive layer, and a second conductive layer,
wherein the first insulating layer is provided over the first conductive layer,
wherein the second conductive layer is provided over the first insulating layer,
wherein the first insulating layer comprises a first opening reaching the first conductive layer,
wherein the second conductive layer comprises a second opening in a region overlapping with the first opening,
wherein in the first opening and the second opening, the first semiconductor layer is in contact with a top surface of the first conductive layer, a side surface of the first insulating layer, and a side surface of the second conductive layer,
wherein the second semiconductor layer is provided over the first semiconductor layer,
wherein the third semiconductor layer is provided over the second semiconductor layer,
wherein the first semiconductor layer comprises a first metal oxide,
wherein the second semiconductor layer comprises a second metal oxide,
wherein the third semiconductor layer comprises a third metal oxide,
wherein the first metal oxide comprises indium, a first element, and zinc,
wherein the second metal oxide comprises indium and a second element,
wherein the third metal oxide comprises indium, a third element, and zinc,
wherein the first element is one or more of gallium, aluminum, and tin,
wherein the second element is one or more of gallium, aluminum, and tin,
wherein the third element is one or more of gallium, aluminum, and tin,
wherein a content percentage of the first element is higher than a content percentage of the second element,
wherein a content percentage of the third element is higher than the content percentage of the first element,
wherein a thickness of the third semiconductor layer is larger than a thickness of the first semiconductor layer, and
wherein a thickness of the second semiconductor layer is larger than the thickness of the third semiconductor layer.

19 more elements

Dependencies are inferred from the claim text.

Facts

Application: 19/149,636Filed 9 Feb 2024
Priority: JP 2023-02369517 Feb 2023
Published: 30 Jul 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification22 codes

H10D 30/6755
Characterised by the active materials: oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
G06F 3/0412
Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means: digitisers structurally integrated in a display
G06F 3/0421
By opto-electronic means: by interrupting or reflecting a light beam, e.g. optical touch-screen
H10D 30/67
Insulated-gate field-effect transistors [IGFET]: thin-film transistors [TFT]