Foreground self-calibration method for split successive-approximation register analog-to-digital converter and the apparatus thereof

Abstract

The present invention relates to a foreground self-calibration method for a split successive-approximation register analog-to-digital converter (SAR ADC) and an apparatus thereof, which restores a binary-weighted relationship between capacitors through a designed platform and improves overall linearity and performance of the SAR ADC, and comprises a precharge step of setting an initial state of binary-weighted capacitors configured in a first ADO channel and a second ADC channel, and a capacitance-calibration step of sequentially calibrating the binary-weighted capacitors of the first ADC channel and the second ADC channel by connecting the binary-weighted capacitors in a parallel connection or an antiparallel connection.

Dependencies are inferred from the claim text.