Methods and apparatus to notch filter using parallel filter circuitry

An apparatus comprising:

• an analog to digital converter (ADC) having an output;
• decimation filter circuitry having an input and an output, the input of the decimation filter circuitry coupled to the output of the ADC;
• multiplexer circuitry having an input, a first output, and a second output, the input of the multiplexer circuitry coupled to the output of the decimation filter circuitry;
• first filter circuitry having an input coupled to the first output of the multiplexer circuitry;
• and
• second filter circuitry having an input coupled to the second output of the multiplexer circuitry.

An apparatus comprising:

• multiplexer circuitry having a first output and a second output;
• first delay circuitry having an input and an output, the input of the first delay circuitry coupled to the first output of the multiplexer circuitry, the first delay circuitry configured to delay signals by a filter delay, the filter delay based on a number of filter circuitry, a notch frequency, and an oversampling rate;
• second delay circuitry having an input and an output, the input of the second delay circuitry coupled to the second output of the multiplexer circuitry, the second delay circuitry configured to delay signals by the filter delay;
• first filter circuitry having an input coupled to the output of the first delay circuitry;
• and
• second filter circuitry having an input coupled to the output of the second delay circuitry.