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US 2026/0221168 A1Published application
Power Regulator and Multiplexer for a Three-Rail Memory
AssigneeQUALCOMM Incorporated
InventorXiao CHEN
Life of this patent
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Abstract
A three-rail memory is provided in which a core periphery is powered by a core power supply voltage. The three-rail memory also includes a bitcell array powered by a memory power supply voltage. A write driver that is powered by a bit line power supply voltage writes to the bitcell array during a write operation. A first regulator that is powered by the memory power supply voltage regulates the bit line power supply voltage in response to the core power supply voltage being less than a first reference voltage.
Claims20
A system, comprising:
- a core logic circuit powered by a core power supply voltage;
- a bitcell array powered by a memory power supply voltage;
- a write driver coupled to the bitcell array and powered by a bit line power supply voltage;
- and
- a first regulator powered by the memory power supply voltage and configured to regulate the bit line power supply voltage.
2 more elements
A system, comprising:
- a three-rail memory including a bitcell array powered by a memory power voltage, a write driver powered by a bit line power supply voltage, and core periphery powered by a core power supply voltage;
- and
- first means for regulating the bit line power supply voltage to equal a first reference voltage in response to the core power supply voltage being less than the first reference voltage.
A system, comprising:
- a core logic circuit powered by a core power supply voltage;
- a bitcell array powered by a selected power supply voltage;
- a write driver coupled to the bitcell array and powered by a bit line power supply voltage;
- and
- a first multiplexer configured to select between the core power supply voltage and a memory power supply voltage to form the selected power supply voltage.
2 more elements
Dependencies are inferred from the claim text.