Gate driver and display apparatus including the same
AssigneeLG Display Co., Ltd.
InventorsDaHye SHIM, Booheung LEE, HyeonJu TAK
Life of this patent
Estimating the term…
Abstract
A display apparatus includes a display panel including a display area and a non-display area and a gate driver including an emission signal generator distributed and disposed in the display area, wherein the emission signal generator includes a first circuit driven to output an emission signal of a low voltage, a second circuit driven to start an operation of the emission signal generator, a third circuit driven to output a carry signal of a low voltage or a carry signal of a high voltage, and a fourth circuit driven to output an emission signal of a high voltage, and the first to fourth circuits are disposed apart from one another with at least one pixel block therebetween.
Claims20
A display apparatus comprising:
- a display panel including a display area and a non-display area;
- and
- a gate driver including an emission signal generator distributed and disposed in the display area,
- wherein the emission signal generator comprises:
- a first circuit configured to output an emission signal of a low voltage;
- a second circuit configured to start an operation of the emission signal generator;
- a third circuit configured to output a carry signal of a low voltage or a carry signal of a high voltage;
- and
- a fourth circuit configured to output an emission signal of a high voltage, and
- the first, second, third, and fourth circuits are disposed apart from one another with at least one pixel block therebetween.
A gate driver comprising:
- a first circuit configured to output an emission signal of a low voltage;
- a second circuit configured to start an operation of an emission signal generator of a display panel;
- a third circuit driven configured to output a carry signal of a low voltage or a carry signal of a high voltage;
- and
- a fourth circuit configured to output an emission signal of a high voltage,
- wherein the third circuit comprises:
- a stabilization transistor including a gate electrode connected to a second voltage line for transferring a second voltage and a first electrode connected to a Q node connected to be controlled by the second circuit;
- a first carry output transistor including a gate electrode connected to a second electrode of the stabilization transistor, a first electrode connected to the second voltage line, and a second electrode connected to a carry output terminal;
- and
- a second carry output transistor including a gate electrode connected to be controlled by the second circuit and connected to a QB node connected to be charged with an electrical potential opposite to an electrical potential of the Q node, a first electrode connected to a first voltage line for transferring a first voltage having a level which differs from a level of the second voltage, and a second electrode connected to the carry output terminal.
A gate driver of a display device, comprising:
- a first output terminal configured to output an emission signal;
- a second output terminal configured to output a carry signal, the second output terminal separate from the first output terminal;
- first circuitry connected to the first output terminal;
- and
- second circuitry connected to the second output terminal,
- wherein the first circuitry includes:
- a first transistor connected between a first power terminal and the first output terminal;
- a first stabilization transistor connected between a Q node and a gate terminal of the first transistor, a gate of the first stabilization transistor connected to the first power terminal;
- and
- a first capacitor connected between the gate terminal of the first transistor and the first output terminal;
- and
- wherein the second circuitry includes:
- a second transistor connected between the first power terminal and the second output terminal;
- a second stabilization transistor connected between the Q node and a gate terminal of the second transistor, a gate of the second stabilization transistor connected to the first power terminal;
- and
- a second capacitor connected between the gate terminal of the second transistor and the second output terminal.
Dependencies are inferred from the claim text.