Memory controllers and memory systems
AssigneeSamsung Electronics Co., Ltd.
InventorsMyungkyu Lee, Seongmuk Kang, Jiho Kim, Kijun Lee, Kyomin Sohn
Life of this patent
Estimating the term…
Loading patent…
AssigneeSamsung Electronics Co., Ltd.
InventorsMyungkyu Lee, Seongmuk Kang, Jiho Kim, Kijun Lee, Kyomin Sohn
Estimating the term…
An error correction code (ECC) engine includes an ECC decoder configured to correct Q symbol errors in a codeword read from a memory cell array, Q being a maximum natural number equal to or less than P/2, P being a natural number equal to or greater than four; the ECC decoder being configured to: generate a syndrome including first through P-th syndrome symbols based on the read codeword by using a parity check matrix; and perform a first ECC decoding to correct a single symbol error in the read codeword based on the first syndrome symbol and a selected syndrome symbol corresponding to one of the second through P-th syndrome symbols and by using a ratio of the selected syndrome symbol to the first syndrome symbol.
-20. (canceled)
An error correction code (ECC) engine comprising:
A semiconductor memory device comprising:
An error correction code (ECC) engine comprising:
Dependencies are inferred from the claim text.