Accelerator offload device and accelerator offload method

An accelerator offload device that offloads specific processing of an application program to an accelerator, the accelerator offload device comprising:

• a request-related processing part;
• a request I/O part;
• a response I/O part;
• a response-related processing part, and an interrupt destination control part,
• wherein the request-related processing part is configured to perform predetermined processing required before performing offloading to the accelerator and then notify the request I/O part of a request to perform offloading,
• wherein the request I/O part is configured to operate on a first CPU core and configured to perform request processing of notifying the accelerator of an offload request,
• wherein the response I/O part is configured to operate on a second CPU core different from the first CPU core to perform response processing of notifying the response-related processing part of operation completion of the accelerator,
• wherein the response-related processing part is configured to perform an operation described in the application program by using an operation result of the accelerator, and
• wherein the interrupt destination control part is configured to set an interrupt destination CPU core to which the accelerator is to raise an interrupt and which is to be used as the second CPU core.

An accelerator offload method of an accelerator offload device that offloads specific processing of an application program to an accelerator, the accelerator offload method comprising steps of:

• performing predetermined processing required before performing offloading to the accelerator and then making a notification of a request to perform offloading;
• performing, by a first CPU core, request processing of notifying the accelerator of an offload request;
• performing, by a second CPU core different from the first CPU core, response processing of notifying of operation completion of the accelerator;
• performing an operation described in the application program by using an operation result of the accelerator;
• and
• setting an interrupt destination CPU core to which the accelerator is to raise an interrupt and which is to be used as the second CPU core.