Processor Environment Agnostic Firmware Management Operation Including a Graphics Processing Unit Offload Management Operation
AssigneeDell Products L.P.
InventorsShekar Babu Suryanarayana, Karunakar Poosapalli, Niyathi Shenoy K
Life of this patent
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Abstract
A firmware management operation. The firmware management operation includes providing an information handling system with a distributed unified BIOS; identifying a processor environment installed on an information handling system from a plurality of processor environments, the processor environment comprising a processor architecture, the information handling system including a graphics processing unit (GPU); and, performing a GPU offload management operation, the GPU offload management operation managing an aspect of offloading a processing operation to the GPU.
Claims20
A computer-implementable method for performing a firmware management operation, comprising:
- providing an information handling system with a distributed unified BIOS;
- identifying a processor environment installed on an information handling system from a plurality of processor environments, the processor environment comprising a processor architecture, the information handling system including a graphics processing unit (GPU);
- and,
- performing a GPU offload management operation, the GPU offload management operation managing an aspect of offloading a processing operation to the GPU.
A system comprising:
- a processor;
- a data bus coupled to the processor;
- and
- a non-transitory, computer-readable storage medium embodying computer program code, the non-transitory, computer-readable storage medium being coupled to the data bus, the computer program code interacting with a plurality of computer operations and comprising instructions executable by the processor and configured for:
- providing an information handling system with a distributed unified BIOS;
- identifying a processor environment installed on an information handling system from a plurality of processor environments, the processor environment comprising a processor architecture, the information handling system including a graphics processing unit (GPU);
- and,
- performing a GPU offload management operation, the GPU offload management operation managing an aspect of offloading a processing operation to the GPU.
A non-transitory, computer-readable storage medium embodying computer program code, the computer program code comprising computer executable instructions configured for:
- providing an information handling system with a distributed unified BIOS;
- identifying a processor environment installed on an information handling system from a plurality of processor environments, the processor environment comprising a processor architecture, the information handling system including a graphics processing unit (GPU);
- and,
- performing a GPU offload management operation, the GPU offload management operation managing an aspect of offloading a processing operation to the GPU.
Dependencies are inferred from the claim text.