Memory systems, methods of operating memory systems, memory devices, and memory controllers
AssigneeYangtze Memory Technologies Co., Ltd.
InventorTao XIONG
Life of this patent
Estimating the term…
Abstract
A memory system includes a memory device and a memory controller, the memory device is coupled with the memory controller, and the memory device includes a plurality of dies, each of the dies includes first physical blocks. The memory controller is configured to, in response to a data write instruction, determine physical blocks of to-be-written data, wherein the number of the physical blocks of the to-be-written data is less than the number of the first physical blocks; and control the memory device to write data to the physical blocks of the to-be-written data according to addresses of the physical blocks of the to-be-written data.
Claims20
A memory system, comprising:
- a memory device including dies, wherein each of the dies comprises first physical blocks;
- and
- a memory controller coupled with the memory device and configured to:
- in response to a data write instruction, determine physical blocks of to-be-written data, wherein a number of the physical blocks of the to-be-written data is less than a number of the first physical blocks;
- and
- control the memory device to write data to the physical blocks of the to-be-written data according to addresses of the physical blocks of the to-be-written data.
A method of operating a memory system, wherein the memory system comprises a memory device comprising dies, each of the dies comprises first physical blocks, and the method comprises:
- in response to a data write instruction, determining physical blocks of to-be-written data, wherein a number of the physical blocks of the to-be-written data is less than the number of the first physical blocks;
- and
- controlling the memory device to write data to the physical blocks of the to-be-written data according to addresses of the physical blocks of the to-be-written data.
A memory controller, comprising:
- a first interface circuit;
- a second interface circuit;
- and
- a processing circuit coupled to the first interface circuit and the second interface circuit and configured to:
- receive, by the first interface circuit, a data write instruction;
- in response to the data write instruction, control, by the second interface circuit, a memory device to write data to physical blocks of to-be-written data, wherein the memory device comprises dies, each of the dies comprises first physical blocks, and a number of the physical blocks of the to-be-written data is less than a number of the first physical blocks.
Dependencies are inferred from the claim text.