Systems and methods for high performance read with on-die circuits
AssigneeKioxia Corporation
InventorsAvi Steiner, Ofir Kanter, Hanan Weingarten
Life of this patent
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Abstract
The present disclosure relates to a flash memory system including a controller and one or more memory integrated circuits. Each of the one or more memory integrated circuits may include a circuit and a non-volatile memory comprising one or more blocks. Each block may include a plurality of rows of cells. The circuit may perform a read operation on a page of the non-volatile memory. The circuit may decode data of the page. In response to determining that decoding of the data fails, the controller may read the data from the non-volatile memory. The controller may decode the data.
Claims20
A flash memory system comprising:
- a controller;
- and
- one or more memory integrated circuits, each of the one or more memory integrated circuits comprising:
- a non-volatile memory comprising one or more blocks, each block comprising a plurality of rows of cells, and
- a circuit configured to:
- perform a read operation on a page of the non-volatile memory;
- and
- decode data of the page,
- wherein in response to determining that decoding of the data fails, the controller is configured to read the data from the non-volatile memory and decode the data.
A method for performing operations in a flash memory system comprising a controller and one or more memory integrated circuits,
- each integrated circuit comprising:
- a circuit and a non-volatile memory comprising one or more blocks, each block comprising a plurality of rows of cells, the method comprising:
- performing, by the circuit, a read operation on a page of the non-volatile memory;
- decoding, by the circuit, data of the page;
- in response to determining that decoding of the data fails, reading, by the controller, the data from the non-volatile memory;
- and
- decoding, by the controller, the data.
Dependencies are inferred from the claim text.