Back to results
US 2026/0215313 A1Published application
Wire post bump forming process
AssigneeTexas Instruments Incorporated
InventorsYOU CHYE HOW, WEI LI JULIEN MOK, HUAY YANN TAY
Life of this patent
Estimating the term…
Loading patent…
Loading patent…
AssigneeTexas Instruments Incorporated
InventorsYOU CHYE HOW, WEI LI JULIEN MOK, HUAY YANN TAY
Estimating the term…
A semiconductor device can include a supporting structure and a die that can include a surface on which wire posts can be located and coupled to die connection points. The wire posts can be coupled using solder to the supporting structure. For example, the wire posts can be formed on a wafer using a wire, which can be cut to provide the die. First and second end portions of the wire can be bonded to the wafer. A resist layer can be formed on a surface of the wafer to cover each of the first and second end portions while leaving a middle portion of the wire exposed. The middle portion of the wire can be grinded to leave the first and second wire portions of the wire embedded within the resist layer to form wire posts. The resist layer can be removed to reveal the wire posts.
A semiconductor package comprising:
A method comprising:
A method for fabricating a semiconductor package, the method comprising:
Dependencies are inferred from the claim text.