Semiconductor device and methods of formation

A method, comprising:

• forming a plurality of integrated circuit devices in a device layer of a semiconductor device;
• forming, above the device layer, a dielectric layer of an interconnect layer of the semiconductor device;
• forming an interconnect structure of the interconnect layer in the dielectric layer,
• wherein the interconnect structure comprises a source/drain interconnect structure or a gate interconnect structure, and is coupled to at least one of the integrated circuit devices;
• forming a self-assembled monolayer film on a top surface of the interconnect structure;
• forming an adhesion layer on the dielectric layer,
• wherein the self-assembled monolayer film inhibits adsorption of material of the adhesion layer onto the top surface of the interconnect structure;
• forming a metal layer over the adhesion layer and over the interconnect structure;
• etching the metal layer to define a metallization structure of the interconnect layer,
• wherein the metallization structure located over and electrically coupled to the interconnect structure;
• and
• sealing areas on opposing sides of the metallization structure with dielectric plugs.

A semiconductor device, comprising:

• a device layer;
• an integrated circuit device in the device layer;
• a dielectric layer above the device layer;
• an interconnect structure in the dielectric layer and electrically coupled to a contact of the integrated circuit device;
• an adhesion layer above the dielectric layer,
• wherein the adhesion layer contains an adhesion material;
• a metal layer above the adhesion layer;
• and
• a metallization structure above and electrically coupled to the interconnect structure,
• wherein the metallization structure is laterally adjacent to the metal layer, and
• wherein an interface between the metallization structure and the interconnect structure is free of the adhesion material of the adhesion layer;
• and
• an isolation region along at least one sidewall of the metallization structure,
• wherein the isolation region comprises:
• an air spacer along a first portion of the sidewall;
• and
• a dielectric plug along a second portion of the sidewall above the first portion.