Charge compensation circuit for improved response to voltage buffer transients

A DC-DC converter circuit, comprising:

• a power stage comprising a plurality of stacked transistors, including at least a voltage buffer biased transistor configured to receive a buffered output at a gate terminal,
• wherein the power stage is configured to generate an output voltage based on a source voltage;
• a voltage buffer configured to receive an input supply at a voltage buffer input port and generate the buffered output at a voltage buffer output port;
• a load circuit configured to generate a load output current signal, wherein a change in the load output current signal alters a charge at the voltage buffer output port;
• and
• a charge compensation circuit, comprising:
• a first charge compensation port configured to receive the output voltage;
• and
• a second charge compensation port electrically connected to the voltage buffer output port,
• wherein the charge compensation circuit detects the change in the output voltage and compensates the charge at the voltage buffer output port.

An input-output buffer circuit, comprising:

• an input port configured to receive an input signal;
• level-shifter logic circuitry configured to generate a first level-shifted output signal and a second level-shifted output signal;
• pre-driver circuitry comprising:
• a high pre-driver stage configured to receive the first level-shifted output signal and generate a high pre-driver signal based on a voltage supply and a low reference voltage;
• a low pre-driver stage configured to receive the second level-shifted output signal and generate a low pre-driver signal;
• a driver stage configured to generate a voltage-adjusted output signal based on the high pre-driver signal, and the low pre-driver signal;
• a voltage buffer configured to receive an input supply at a voltage buffer input port and generate the low reference voltage at a voltage buffer output port;
• and
• a charge compensation circuit, comprising:
• a first charge compensation port configured to receive the input signal;
• and
• a second charge compensation port electrically connected to the voltage buffer output port,
• wherein the charge compensation circuit compensates a charge at the voltage buffer output port based on the input signal.