Active clamp circuit and semiconductor device
AssigneeShindengen Electric Manufacturing Co., Ltd.
InventorHiromi ITO
Life of this patent
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Abstract
An active clamp circuit includes a clamp voltage control use switch where first main switch is electrically connected to a main electrode of a main switch and a second main switch is electrically connected to a control electrode of the main switch; and a clamp voltage decision part where one terminal of the clamp voltage decision part is electrically connected to a first main electrode of the clamp voltage control switch and the other terminal is electrically connected to a control electrode of the clamp voltage control use switch, wherein the clamp voltage decision part had a plurality of sets each is constituted of a temperature characteristic adjustment resistor, a Zener diode, and a diode, and the sets are connected in series.
Claims17
An active clamp circuit that is connected between a control electrode and a main electrode of a main switch and is configured to control a clamp voltage of the main switch, the active clamp circuit comprising:
- a clamp voltage control use switch that includes a first main electrode, a second main electrode and a control electrode, wherein the second main electrode is electrically connected with the main electrode of the main switch, the first main electrode is electrically connected with the control electrode of the main switch, and
- a clamp voltage decision part where one terminal of the clamp voltage decision part is electrically connected to the second main electrode of the clamp voltage control use switch and an other terminal of the clamp voltage decision part is electrically connected to the control electrode of the clamp voltage control use switch, wherein
- the clamp voltage decision part includes a plurality of sets each being constituted of a temperature characteristic adjustment resistor, a Zener diode connected to one end of the temperature characteristic adjustment resistor, and a diode connected to an other end of the temperature characteristic adjustment resistor such that the diode has an opposite characteristic with respect to the Zener diode, the sets being connected in series.
An active clamp circuit that is connected between a control electrode and a main electrode of a main switch and is configured to control a clamp voltage of the main switch, the active clamp circuit comprising:
- a bypass diode that includes an anode electrode and a cathode electrode, wherein the anode electrode is electrically connected with the control electrode of the main switch, and the cathode electrode is electrically connected with the main electrode of the main switch, and
- a clamp voltage decision part where one terminal of the clamp voltage decision part is electrically connected to the cathode electrode of the bypass diode and an other terminal of the clamp voltage decision part is electrically connected to the anode electrode of the bypass diode and the control electrode of the main switch, wherein
- the clamp voltage decision part includes a plurality of sets each being constituted of a temperature characteristic adjustment resistor, a Zener diode connected to one end of the temperature characteristic adjustment resistor, and a diode connected to an other end of the temperature characteristic adjustment resistor such that the diode has an opposite characteristic with respect to the Zener diode, the sets being connected in series,
A semiconductor device that forms an active clamp circuit that is connected between a control electrode and a main electrode of a main switch and is configured to control a clamp voltage of the main switch, and is formed on a semiconductor base body on which a device region and a withstand voltage separation region that is formed around the device region are defined from each other, wherein
- the semiconductor device includes, in the device region,
- the semiconductor base body,
- a first main electrode that is formed on a surface of the semiconductor base body on a front surface side,
- a gate pad that is formed on the surface of the semiconductor base body on the front surface side, and is spaced apart from the first main electrode, and
- a second main electrode that is formed on a surface of the semiconductor base body on a back surface side,
- the semiconductor device includes an MOS structure that is formed in a region in which the first main electrode is formed, and
- the semiconductor device includes, in the withstand voltage separation region, the semiconductor base body,
- the second main electrode that is formed on the surface of the semiconductor base body on the back surface side,
- an insulation film formed on the surface of the semiconductor base body,
- a clamp voltage decision part where, on the insulation film, in a region that surrounds the device region as viewed in a plan view, a plurality of first first-conductive-type region and a plurality of first second-conductive-type region are alternately disposed adjacently to each other, wherein one end of the clamp voltage decision part is electrically connected to the gate pad, and the other end of the clamp voltage decision part is electrically connected to the second main electrode, and
- in the clamp voltage decision part, a total dopant amount of the first first-conductive-type region sandwiched by the two first second-conductive-type regions is smaller than a total dopant amount of one of the two first second-conductive-type regions disposed adjacently to the first first-conductive-type region, and is also smaller than a total dopant amount of the other of the two first second-conductive-type regions disposed adjacently to the first first-conductive-type region.
A semiconductor device that forms an active clamp circuit that is connected between a control electrode and a main electrode of a main switch and is configured to control a clamp voltage of the main switch, and is formed on a semiconductor base body on which a device region and a withstand voltage separation region that is formed around the device region are defined from each other, wherein
- the semiconductor device includes, in the device region,
- the semiconductor base body,
- a first main electrode that is formed on a surface of the semiconductor base body on a front surface side, and
- a second main electrode that is formed on a surface of the semiconductor base body on a back surface side,
- a diode structure that is formed in a region in which the first main electrode is formed, and
- the semiconductor device includes, in the withstand voltage separation region,
- the semiconductor base body,
- the second main electrode that is formed on the surface of the semiconductor base body on the back surface side, and
- an insulation film formed on the surface of the semiconductor base body, and
- a clamp voltage decision part where, on the insulation film, in a region that surrounds the device region as viewed in a plan view, a plurality of first first-conductive-type region and a plurality of first second-conductive-type region are alternately disposed adjacently to each other, wherein one end of the clamp voltage decision part is electrically connected to the first main electrode, and the other end of the clamp voltage decision part is electrically connected to the second main electrode, and
- in the clamp voltage decision part, a total dopant amount of the first first-conductive-type region sandwiched by the two first second-conductive-type regions is smaller than a total dopant amount of one of two first second-conductive-type regions disposed adjacently to the first first-conductive-type region, and is also smaller than a total dopant amount of the other of two first second-conductive-type regions disposed adjacently to the first first-conductive-type region.
The semiconductor device according to claim Z, wherein the clamp voltage decision part surrounds the whole circumference of the device region as viewed in a plan view.
Dependencies are inferred from the claim text.