US 2026/0212101 A1Published application

Circuit configuration device and method

AssigneeASUSTeK COMPUTER INC.

InventorsHsi-Ho Hsu, Hsiang-Jui Hung, Wei-Gen Chung, Chun-San Lin, Yu-Kai Yeh, Chang-Tsai Tsai, Yu-Xuan Du, Bo-Siang Cheng

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Abstract

Provided are a circuit configuration device and a circuit configuration method. The method is applicable to a buck circuit and including the following steps: evaluating an inductance range suitable for the buck circuit according to a design specification of the buck circuit; testing multiple efficiency curves respectively corresponding to multiple inductance values in the inductance range according to the design specification and the inductance range; analyzing the efficiency curves to obtain one or more efficiency curve intersection points; planning an inductor region to be configured on the buck circuit according to the inductance range and the efficiency curve intersection point. The inductor region includes one or more inductor groups. Each inductor group is formed by packaging after series connection of multiple inductor elements. The circuit inductance formed by the inductor region varies with a state of the buck circuit.

Claims16

Dependent claims

A circuit configuration device, applicable for configuring a buck circuit, the circuit configuration device comprising:

a storage device, configured to store a design specification of the buck circuit;
and
a circuit configuration processor, coupled to the storage device, configured to load the design specification to execute:
evaluating an inductance range suitable for the buck circuit according to the design specification;
testing a plurality of efficiency curves respectively corresponding to a plurality of inductance values in the inductance range according to the design specification and the inductance range;
analyzing the efficiency curves to obtain one or more efficiency curve intersection points;
and
planning an inductor region to be configured on the buck circuit according to the inductance range and the one or more efficiency curve intersection points,
wherein, the inductor region comprises one or more inductor groups, each of the one or more inductor groups is formed by packaging after series connection of a plurality of inductor elements, a circuit inductance formed by the inductor region varies with a state of the buck circuit.

6 more elements

A circuit configuration method, applicable to a buck circuit, the circuit configuration method comprising:

evaluating an inductance range suitable for the buck circuit according to a design specification of the buck circuit;
testing a plurality of efficiency curves respectively corresponding to a plurality of inductance values in the inductance range according to the design specification and the inductance range;
analyzing the efficiency curves to obtain one or more efficiency curve intersection points;
and
planning an inductor region to be configured on the buck circuit according to the inductance range and the one or more efficiency curve intersection points,
wherein, the inductor region comprises one or more inductor groups, each of the one or more inductor groups is formed by packaging after series connection of a plurality of inductor elements, a circuit inductance formed by the inductor region varies with a state of the buck circuit.

3 more elements

Dependencies are inferred from the claim text.