Low quiescent power low dropout topology
AssigneeQUALCOMM Incorporated
InventorKshitij YADAV
Life of this patent
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Abstract
A voltage regulator includes a voltage circuit configured to generate a gate voltage based on a reference voltage. The voltage regulator also includes an n-type field effect transistor (NFET), wherein a gate of the NFET is coupled to the voltage circuit to receive the gate voltage, and a source of the NFET is coupled to an output of the voltage regulator. The voltage regulator also includes a current source coupled between a supply rail and a drain of the NFET, and a p-type field effect transistor (PFET), wherein a source of the PFET is coupled to the supply rail, a gate of the PFET is coupled to the drain of the NFET, and a drain of the PFET is coupled to the output of the voltage regulator.
Claims14
A voltage regulator, comprising:
- a voltage circuit configured to generate a gate voltage based on a reference voltage;
- an n-type field effect transistor (NFET), wherein a gate of the NFET is coupled to the voltage circuit to receive the gate voltage, and a source of the NFET is coupled to an output of the voltage regulator;
- a current source coupled between a supply rail and a drain of the NFET;
- and
- a p-type field effect transistor (PFET), wherein a source of the PFET is coupled to the supply rail, a gate of the PFET is coupled to the drain of the NFET, and a drain of the PFET is coupled to the output of the voltage regulator.
A voltage regulator, comprising:
- a first n-type field effect transistor (NFET), wherein a drain of the first NFET is coupled to a supply rail;
- a first resistor coupled between a source of the first NFET and a low rail;
- an amplifier, wherein a first input of the amplifier is configured to receive a reference voltage, a second input of the amplifier is coupled to the source of the first NFET via a feedback path, and an output of the amplifier is coupled to a gate of the first NFET;
- a second NFET, wherein a gate of the second NFET is coupled to the gate of the first NFET, and a source of the second NFET is coupled to an output of the voltage regulator;
- a current source coupled between the supply rail and a drain of the second NFET;
- and
- a p-type field effect transistor (PFET), wherein a source of the PFET is coupled to the supply rail, a gate of the PFET is coupled to the drain of the second NFET, and a drain of the PFET is coupled to the output of the voltage regulator.
A method for operating a voltage regulator, the voltage regulator including an n-type field effect transistor (NFET) and a p-type field effect transistor (PFET), wherein a source of the NFET is coupled to an output of the voltage regulator, a source of the PFET is coupled to a supply rail, a gate of the PFET is coupled to a drain of the NFET, and a drain of the PFET is coupled to the output of the voltage regulator, the method comprising:
- generating a gate voltage based on a reference voltage;
- applying the gate voltage to a gate of the NFET;
- and
- providing a bias current to the drain of the NFET.
Dependencies are inferred from the claim text.