Via accuracy measurement
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsWei-Hsuen Lee, Hung En Hsu, Kuo-Ching Hsu
Life of this patent
Estimating the term…
Abstract
Methods and pad structures to test via accuracy are provided. A method according to the present disclosure includes forming a first pad and a second pad on a device component, wherein the second pad includes a via landing area and a clearance opening, providing a core substrate that includes a cavity, placing the device component in the cavity, forming a build-up film over the device component and the core substrate, forming a first contact via extending through the build-up film to contact the landing area and a second contact via extending through build-up film and the clearance opening, and performing a continuity test to determine whether the second contact via is in contact with the second pad.
Claims20
A semiconductor structure, comprising:
- a core structure;
- a passive device component embedded in the core structure;
- an insulation layer over the passive device component;
- a contact pad disposed in the insulation layer and comprising:
- a via landing area, and
- a through opening;
- a build-up film over the insulation layer and the contact pad;
- a first contact via extending through the build-up film and landing on the via landing area;
- and
- a second contact via extending through the build-up film and the through opening.
A semiconductor structure, comprising:
- a core structure;
- a passive device component embedded in the core structure;
- an insulation layer over the passive device component;
- a contact pad disposed in the insulation layer and comprising:
- a via landing area, and
- a through opening;
- a build-up film over the insulation layer and the contact pad;
- a first contact via extending through the build-up film and landing on the via landing area;
- and
- a second contact via extending through the build-up film and the through opening,
- wherein the insulation layer comprises polyimide,
- wherein a thickness of the insulation layer is greater than a thickness of the contact pad.
A semiconductor structure, comprising:
- a core structure;
- a device component embedded in the core structure;
- a pad disposed over the device component, the pad comprising a via landing area and a clearance opening;
- a build-up film disposed over the core structure and the device component;
- a first contact via extending through the build-up film and landing on the via landing area;
- and
- a second contact via extending through the build-up film and the clearance opening.
Dependencies are inferred from the claim text.