Memory cell, semiconductor device having the same, and methods of manufacturing the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsYu-Chao Lin, Yu-Sheng Chen, Carlos H. Diaz, Da-Ching Chiou
Life of this patent
Estimating the term…
Abstract
A memory cell includes a bottom electrode, a storage element layer, a first buffer layer, and a top electrode. The storage element layer is disposed over the bottom electrode. The first buffer layer is interposed between the storage element layer and the bottom electrode, where a thermal conductivity of the first buffer layer is less than a thermal conductivity of the storage element layer. The top electrode is disposed over the storage element layer, where the storage element layer is disposed between the top electrode and the first buffer layer.
Claims20
A memory cell, comprising:
- a bottom electrode;
- a storage element layer, disposed over the bottom electrode;
- a first buffer layer, interposed between the storage element layer and the bottom electrode, wherein a thermal conductivity of the first buffer layer is less than a thermal conductivity of the storage element layer;
- a top electrode, disposed over the storage element layer, wherein the storage element layer is disposed between the top electrode and the first buffer layer;
- and
- a protection layer, covering sidewalls of the top electrode, the storage element layer and the first buffer layer, and a bottommost surface of the protection layer is substantially level with or above the first surface of the bottom electrode in a stacking direction of the bottom electrode and the first buffer layer.
A memory cell, comprising:
- a heater;
- a storage element layer, disposed over the heater;
- a first thermal insulating layer, interposed between the storage element layer and the heater, wherein a thermal conductivity of the first thermal insulating layer is less than a thermal conductivity of the storage element layer;
- a top electrode, disposed over the storage element layer;
- and
- an etching stop layer, extending along the top electrode, the first thermal insulating layer, the storage element layer and the heater, wherein in a cross-section of the memory cell along a stacking direction of the heater and the top electrode, the etching stop layer covers a sidewall of the heater and is extended between the top electrode and the heater.
A method of manufacturing a memory cell, comprising:
- forming a bottom electrode;
- forming a first buffer material, a storage element material and a top electrode material over the bottom electrode;
- patterning the top electrode material, the storage element material and the first buffer material to form a top electrode, a storage element layer and a first buffer layer, wherein the storage element layer is disposed between the bottom electrode and the top electrode, the first buffer layer is interposed between the bottom electrode and the storage element layer, and a thermal conductivity of the first buffer layer is less than a thermal conductivity of the storage element layer;
- and
- disposing a protection layer covering sidewalls of the top electrode, the storage element layer and the first buffer layer, and a bottommost surface of the protection layer is substantially level with or above the first surface of the bottom electrode in a stacking direction of the bottom electrode and the first buffer layer.
Dependencies are inferred from the claim text.