Two-stage manufacturing for electro-absorption modulator and photodiode

A photonic integrated circuit (PIC) epitaxially fabricated using a manufacturing method having two epitaxial growth stages, the method comprising:

• providing a starting PIC structure comprising a silicon substrate having first and second rib waveguides formed therein, a silicon dioxide layer disposed on the silicon substrate, and a first epitaxy inhibition layer disposed on the silicon dioxide layer;
• forming a first cavity in the PIC structure using photolithography and chemical etching, the cavity extending through the first epitaxy inhibition layer and silicon dioxide layer and into the first rib waveguide formed in the silicon substrate;
• using selective area epitaxy for growing a first epitaxial structure in the first cavity in the PIC structure, the first epitaxial structure comprising one of a PD or an EAM;
• depositing a first protection layer over a top surface of the PIC structure;
• selectively etching the first protection layer to remove portions of the first protection layer except for a remaining portion that is positioned above the first epitaxial structure;
• depositing a second epitaxy inhibition layer over the top surface of the PIC structure;
• subsequent to the deposition of the second epitaxy inhibition layer, forming a second cavity in the PIC structure using photolithography and chemical etching, the second cavity extending through the second epitaxy inhibition layer, the first epitaxy inhibition layer, and the silicon dioxide layer and into the second rib waveguide formed in the silicon substrate;
• using selective area epitaxy for growing a second epitaxial structure in the second cavity in the PIC structure, the second epitaxial structure being different from the first epitaxial structure and comprising one of a PD or an EAM;
• and
• applying a second protection layer over the top surface of the PIC structure.

A method for fabricating epitaxial structures on a wafer for a photonic interface, comprising:

• providing a wafer for a photonic integrated circuit (PIC) structure comprising a silicon substrate upon which a silicon dioxide layer is disposed, the silicon substrate being arranged for providing a plurality of optical waveguides, and in which an epitaxy inhibition layer is disposed over the silicon dioxide layer;
• and
• utilizing a two-stage manufacturing process to fabricate a first epitaxial structure comprising an electro-absorption modulator (EAM) and a second epitaxial structure on the silicon substrate comprising a photodiode (PD), wherein the fabricated EAM and the fabricated PD are located on the silicon substrate, and
• wherein the two-stage manufacturing process comprises separate non-time-synchronous stages of selective etching and selective area epitaxial growth for the EAM and PD epitaxial structures that are performed sequentially, in which a first stage of selective etching and selective area epitaxial growth is commenced and completed prior to commencement of a second stage of selective etching and selective area epitaxial growth.