US 2026/0206254 A1 · SEMICONDUCTOR DEVICE

Abstract

A semiconductor device includes a substrate, a well region disposed inside the substrate, a first trench recessed from an upper surface of the substrate toward a lower surface of the substrate, a first drift region disposed on a first side of the first trench in a horizontal direction inside the well region, a portion of the first drift region overlapping with a bottom surface of the first trench in a vertical direction, a second drift region disposed on a second side of the first trench opposite to the first side of the first trench in the horizontal direction inside the well region, the second drift region spaced apart from the first drift region in the horizontal direction, a portion of the second drift region overlapping with the bottom surface of the first trench in the vertical direction, a first gate stack contacting the first drift region inside the first trench, the first gate stack conformally disposed along a first sidewall and the bottom surface of the first trench, a second gate stack contacting the second drift region inside the first trench, the second gate stack conformally disposed along a second sidewall and the bottom surface of the first trench, and a source region disposed between the first gate stack and the second gate stack inside the well region, the source region spaced apart from each of the first and second drift regions.

Claims20

Dependent claims

A semiconductor device comprising:

a substrate;
a well region disposed inside the substrate;
a first trench recessed from an upper surface of the substrate toward a lower surface of the substrate;
a first drift region disposed at a first side of the first trench in a horizontal direction inside the well region, a portion of the first drift region overlapping with a bottom surface of the first trench in a vertical direction;
a second drift region disposed at a second side of the first trench opposite to the first side of the first trench in the horizontal direction inside the well region, the second drift region spaced apart from the first drift region in the horizontal direction, a portion of the second drift region overlapping with the bottom surface of the first trench in the vertical direction;
a first gate stack contacting the first drift region inside the first trench, the first gate stack conformally disposed along a first sidewall and the bottom surface of the first trench;
a second gate stack contacting the second drift region inside the first trench, the second gate stack conformally disposed along a second sidewall and the bottom surface of the first trench;
and
a source region disposed between the first gate stack and the second gate stack inside the well region, the source region spaced apart from each of the first and second drift regions.

6 more elements

A semiconductor device comprising:

a substrate;
a well region disposed inside the substrate;
a first trench recessed from an upper surface of the substrate toward a lower surface of the substrate;
a first drift region disposed at a first side of the first trench in a horizontal direction inside the well region, a portion of the first drift region overlapping with a bottom surface of the first trench in a vertical direction;
a second drift region disposed at a second side of the first trench opposite to the first side of the first trench in the horizontal direction inside the well region, the second drift region spaced apart from the first drift region in the horizontal direction, a portion of the second drift region overlapping with the bottom surface of the first trench in the vertical direction;
a first gate stack contacting the first drift region inside the first trench;
a second gate stack contacting the second drift region inside the first trench, the second gate stack spaced apart from the first gate stack in the horizontal direction;
a first gate spacer disposed on opposite sidewalls of the first gate stack in the horizontal direction, the first gate spacer comprising a first portion overlapping the first drift region in the vertical direction and a second portion overlapping the first trench in the vertical direction;
and
a second gate spacer disposed on opposite sidewalls of the second gate stack in the horizontal direction, the second gate spacer comprising a first portion overlapping with the second drift region in the vertical direction and a second portion overlapping with the first trench in the vertical direction,
wherein an upper surface of the second portion of the first gate spacer is formed lower than an upper surface of the first portion of the first gate spacer, and
wherein an upper surface of the second portion of the second gate spacer is formed lower than an upper surface of the first portion of the second gate spacer.

9 more elements

A semiconductor device comprising:

a substrate;
a well region disposed inside the substrate;
a first trench recessed from an upper surface of the substrate toward a lower surface of the substrate;
a first drift region disposed at a first side of the first trench in a first horizontal direction inside the well region, a portion of the first drift region overlapping with a bottom surface of the first trench in a vertical direction;
a second drift region disposed at a second side of the first trench opposite to the first side of the first trench in the first horizontal direction inside the well region, the second drift region spaced apart from the first drift region in the first horizontal direction, a portion of the second drift region overlapping with the bottom surface of the first trench in the vertical direction;
a first gate stack contacting the first drift region inside the first trench, the first gate stack conformally disposed along a first sidewall and the bottom surface of the first trench, a portion of the first gate stack contacting an upper surface of the first drift region;
a second gate stack contacting the second drift region inside the first trench, the second gate stack conformally disposed along a second sidewall and the bottom surface of the first trench, a portion of the second gate stack contacting an upper surface of the second drift region, the second gate stack spaced apart from the first gate stack in the first horizontal direction on the bottom surface of the first trench;
a source region disposed between the first gate stack and the second gate stack inside the well region, the source region spaced apart from each of the first and second drift regions;
a first drain region disposed on one side of the first gate stack inside the first drift region;
a second drain region disposed on one side of the second gate stack inside the second drift region;
a first gate spacer disposed on opposite sidewalls of the first gate stack in the first horizontal direction, the first gate spacer comprising a first portion overlapping with the first drift region in the vertical direction and a second portion overlapping with the first trench in the vertical direction;
and
a second gate spacer disposed on opposite sidewalls of the second gate stack in the first horizontal direction, the second gate spacer comprising a first portion overlapping with the second drift region in the vertical direction and a second portion overlapping with the first trench in the vertical direction,
wherein an upper surface of the second portion of the first gate spacer is formed lower than an upper surface of the first portion of the first gate spacer, and
wherein an upper surface of the second portion of the second gate spacer is formed lower than an upper surface of the first portion of the second gate spacer.

12 more elements

Dependencies are inferred from the claim text.

Semiconductor device

Life of this patent

Semiconductor device

Life of this patent

Abstract

Claims20