Method to reduce impact of device leakage in current digital-to-analog converter

A system, comprising:

• a bias circuit configured to generate a bias voltage and output the bias voltage at an output of the bias circuit;
• and
• a current digital-to-analog converter (DAC) comprising current cells coupled in parallel, wherein each of the current cells comprises:
• a respective bias transistor, wherein a gate of the respective bias transistor is coupled to the output of the bias circuit;
• a respective first switch, wherein the respective first switch and the respective bias transistor are coupled in series between a respective internal node and a ground;
• a respective second switch coupled between the respective internal node and an output of the current DAC, wherein a control input of the respective second switch is coupled to a control input of the respective first switch;
• and
• a respective third switch coupled between a reference voltage and the respective internal node.